Hi,
I've been looking at the documentation of the DZ87KLT-75K board. In the block diagram it looks as if the haswell has a 16x set of pci-e and another set of 4x pci-e lanes. this makes a total of 20 lanes. However i cannot find any documentation on this anywhere. The datasheet defines only 16 lanes. Where did the other 4 lanes come from ?
The PCH has 8 lanes pci-e v2.0 and they are all in use.
The DH87MC has the same peculiarity. I also checked boards from other vendors, no one has more than 16 pci-e v3 lanes coming off the processor.
Is this a documentation flaw or is there something special going on here ?
thanks,
Robert