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I bought one of those Galileo boards some time ago, I dont know if the Gen2 has changed anything since then. When i get a board the first think i do for a test is to try out the SIP port. WHen i tried this in the Galileo it was worthless to me. Digging into it further the CS, mosi, misom , & clk lines did not come out directly from the core but was routed to some other IC that mimicked SPI. It was because of them doing it this way caused the much slower SPI bus speeds. Maybe if the Gen2 has kept that silly same setup it is this causing the problems.